This is Part 1 of a Three Part Series

• Part 1:It’s What’s Inside that Counts
• Part 2:Judging a Book by Its Cover:Don’t Forget the Outside
• Part 3:It Ain’t the Volts, It’s the Amps:Some Applications and Considerations

Greetings fellow components users!  I hope that you have been well.  Have you ever had the need for a high voltage surface mount capacitor, but weren’t sure how to select the right one, or wondered how they are made, or were concerned about the factors you need to be careful of when designing them into your circuit?    In my next three posts, I will try to provide some “enlighteningment” on the subject. 

Surface mount high voltage MLCCs usually appear to be identical to standard MLCCs.   High voltage MLCCs are typically available in EIA size from 0603 to 2225 or larger with voltage ratings from 200V to 5,000V or more.  Smaller case high voltage MLCCs typically have lower maximum rated voltages (V_Rated) as the external terminals tend to be closer to each other in comparison to larger case high voltage MLCCs. 

High voltage MLCCs are generally available with Class 1 (C0G) or Class 2 (Ferroelectric X7R) ceramic dielectrics with tolerances as good as +/-5% or better, to as wide as +/-20% or higher.  Because of the generally thicker dielectric thicknesses used in the design and potentially the “cascade” or “floating electrode” type designs used, the maximum capacitance values available are significantly lower than analogous low voltage rated MLCCs.   Generally available capacitance values range from ~1 pF to 2.2 µF or higher.   The ESR is also typically a little higher compared to analogous standard MLCCs, but is still quite low (typically ≤10 mΩ).  So what makes high voltage MLCCs different from standard MLCCs?

The More Things Change, The More They Stay The Same

From the outside, high voltage MLCCs look pretty much identical to standard MLCCs, but as my Momma used to tell me, “it’s what’s inside that counts.”  It seems that it should be straight forward to design high voltage MLCCs.  Just increase the dielectric thickness (DT) to enable the desired voltage rating.  The rate of increase in DT is typically about 200 to 250 V/mil (or about 7.8 to 10 V/µm).  We also know that thicker DT results in less capacitance per unit volume (C/V), having a DT^-2 relationship as shown in Figure 1 below.  So if we double DT, capacitance is quartered and V_Rated is doubled.  Simple…right?  Wait just a second!  As it turns out, it’s not quite that simple.

Figure 1.  Approximate normalized capacitance vs. dielectric thickness for standard configuration MLCC

V_Rated of the ceramic dielectrics used in MLCCs typically demonstrates linear or nearly linear behavior to voltages as high as ~1,000 to ~1,500 V.  But at higher voltages, a different V_Rated vs. dielectric thickness relationship is observed.  An example of this is given in Figure 2 below.

Figure 2.  Dielectric thickness vs. rated voltage for a typical ceramic dielectric used in MLCCs

For the hypothetical example given in Figure 2, a rated voltage of 1,500 V would require ~10 mil (~250 µm) DT.  This would reduce C/V by a factor of ~100 in comparison to a 250V_Rated, 1 mil DT MLCC!  If we could in some way maintain the initial linear relationship (~200 to 250 V/mil) we could have used DT of ~6 mil and C/V would have suffered only about a 35 fold reduction in comparison to a 250V_Rated, 1 mil DT device (i.e., the resulting maximum C/V would be almost 3 times as high in comparison to the case of 10 mil DT).   There must be a way to maintain this relationship, but how?

It’s What’s Inside That Counts

Well, it just so happens that there is a way.  Recalling our freshman EE course, we know that capacitors in parallel are additive, while in series behave in a manner defined by the relation:

We also know that, if all of the capacitors that are in series have the same capacitance value, the above simplifies to:*C_n = Capacitance of capacitor n

 Wow!  Using the above relationships, we can increase V_Rated linearly with a relatively small decrease in capacitance (~C/n).  If only we could fit multiple capacitors in series within a single MLCC…but how?  Well, the structure of a standard configuration MLCC puts multiple capacitors in parallel configuration, so why can’t a clever designer put several capacitors in series configuration, within an MLCC as well?  It just so happens that, long ago, a very clever MLCC designer did exactly that and these floating electrode or cascade electrode design MLCCs have been available for high voltage applications for decades.  Here’s to you, Mr./Mrs./Ms. Clever Designer!

The Details

The basic floating electrode (FE) or cascade electrode designs are illustrated in comparison to a standard electrode configuration design MLCC in Figure 3 below.  From the illustration it is evident that floating electrodes placed between externally connected electrodes result in 2 cascades (or capacitors) per each floating electrode segment used in the design.   One and two FE (or 2 and 4 cascade) designs are illustrated in the figure.  From the figures, we can also see that the electrode active area (A) is reduced with each cascade as well, but if we ignore the dimension of the additional internal margins, the active area is approximately halved for each floating electrode and the rated voltage increases linearly with each internal capacitor in series.

 Because of the reduction in A and the series effect described above, the resulting C/V (ignoring the additional internal margin areas created with each FE) is proportional to 1/n² (where n is the number of cascades created).  This means that V_Rated can increase linearly as the number of FEs is increased, with a C/V penalty that is pretty much analogous to the C/V penalty experienced with a standard capacitor configuration MLCC that utilizes increased DT to achieve desired V_Rated in the linear region below ~1,000 to 1,500 V (i.e., according to the blue line in Figure 2 above).   So now we have a solution to our problem!

Additionally, FE designs largely reduce or eliminate the possibility of short-type failures.  This is because all of the cascades or internal capacitors must fail in order to create a short-type failure.  Thus failure due to flexure cracking or the like is largely mitigated in most cases.  This makes FE type MLCCs also quite valuable in performance critical applications such as across a battery line or the like.

Figure 3.  Illustration of standard vs. floating internal electrode configurations

The Particulars

We can use FE or cascade electrode design to increase V_Rated with minimized impact on C/V.  As each FE will have an additional margin area associated with it, the impact of additional margins on C/V in small case MLCCs (typically EIA 0603 and possibly 0805) may be prohibitive, but for larger MLCCs (e.g., EIA 1206 to 2225) the impact is relatively small.  As in Figure 4 below, C/V decreases commensurate with (1/2n²), where n is the number of FEs within the design.  V_Rated also increases with 2n as does ESR.  The effect on ESR is largely compensated however, as the two or more internal capacitors typically have more electrodes in each internal capacitor stack (N), and since the aspect ratio of said electrodes within each of the internal capacitors will have relatively wide and short electrodes, which results in relatively low ESR, so the actual increase in ESR is typically negligible in comparison to standard configuration MLCCs of similar V_Rated.  Since FE design results in MLCCs having at least two internal capacitors in series, each of the internal capacitors must short in order for the FE MLCC to have an internal short, which is highly unlikely, making FE MLCC highly desirable for applications that are sensitive to short-type failures.  Thus, in comparison to standard configuration MLCCs; with careful design, it is possible to achieve high V_Rated with minimal increase in ESR and decrease in C/V.  

Figure 4.  Effects of floating internal electrodes on capacitance, ESR and rated voltage

In Summary

Floating electrode (FE) or cascade internal electrode designs may be used to increase V_Rated of MLCCs with minimal impact on ESR and capacitance per unit volume (C/V) in comparison to standard configuration MLCCs.  Additionally, FE designs largely reduce or eliminate the possibility of short-type failures and thus are valuable in battery line and other critical applications.  For these reasons, floating electrode or cascade electrode designs are typically superior to standard configuration designs for high voltage applications.

Enter Class 1 Dielectric MLCC

Class 1 dielectric MLCCs are comprised of a different type of dielectric chemistry that does not exhibit ferroelectric behavior.  They are generally termed linear dielectrics.  Class 1 is an Electronics Industry Association (EIA) designation and these dielectrics are typically based on magnesium titanate, or calcium titanate, or neodymium titanate, or barium neodymium titanate or strontium calcium zirconium titanate materials, or the like.  They are called “linear dielectrics” because their dipole response associated with changing electrical field is linear in character. These dielectrics are highly stable with respect to numerous environmental factors.  They exhibit properties (primarily K and df) that do not change appreciably with changing temperature or voltage or pressure, or frequency, etc.  Additionally, they do not age (i.e., loose capacitance over time), and they do not “buzz” or convert vibration to output signal noise.  The most common designation within Class 1 dielectrics is the C0G.  There are numerous other designations for Class 1 dielectrics as well, such as C0H, etc.  More specifics about these designations may be found via the following link.  C0G is the most common and the most stable EIA Class 1 dielectric designation.  Many people (usually us “old timers”) still call it NPO, even though the two designations really shouldn’t be used interchangeably.

A Stable Ally

If you need a highly stable capacitor of value ~0.22 µF or less for your 100V or lower rated application, you should consider C0G MLCC (high voltage versions are available as well).  These capacitors are very stable with respect to temperature (i.e., capacitance varies +/- <=30 ppm/C from -55C to +125C), they typically have dissipation factors (df) well less than 0.1% and they do not experience capacitance aging.  They also have very low dielectric absorption and they do not exhibit significant piezoelectric or micro-phonic effects.  Class 1 C0G MLCCs also typically have low ESR and relatively low ESL and are typically available in sizes from 2225 (EIA) down to 01005 (EIA).  You will give up about 100 fold capacitance per unit volume with respect to Class 2 MLCC or tantalum capacitors, but Class 1 MLCC can have volumetric efficiencies that are equal to or better than film capacitors.  C0G MLCCs are also highly reliable and can be quite robust mechanically, if the dielectric used is zirconate based (SCZT or the like). 

Recent Developments

Just as with Class 2 dielectric MLCCs, Class 1 MLCCs have advanced over the years as well.  C0G MLCCs are now available with base metal internal electrodes (BME) and with relatively thin layers (~4µm dielectric thickness or less) and with very high layer counts (over 300 layers in some cases).  This has enabled a strong increase in capacitance per unit volume in C0G MLCCs, similar to the volumetric efficiency advances with Class 2 dielectric MLCCs discussed in previous blog posts.  However, the dielectric constants are still relatively low (ranging from ~10 to ~100 in most cases) as compared to Class 2 dielectrics (which typically exhibit dielectric constants on the order of 3,000 or higher), so even though C0G MLCCs have advanced greatly, it is still about 100 fold less than Class 2 MLCC with regard to capacitance per unit volume. 

Additionally, new SCZT (strontium calcium zirconium titanate) based dielectrics with either precious metal internal electrodes (PME) or base metal internal electrodes (BME) enable relatively high rated voltage per unit dielectric thickness.  This has enabled highly robust C0G MLCCs such as an EIA 1206 (3216 metric) 50V rated 0.1 µF, for example, that is basically “bulletproof.”  These dielectrics are robust with respect to temperature stability, df, and reliability.  Finally, the advent of low K dielectrics combined with copper BME internal electrodes in a Class 1 dielectric MLCCs has enabled very high quality factor (Q) capacitors that are excellent for high frequency applications.  These advancements have enabled the development of C0G MLCCs that are suitable for most needs at or below 0.22 µF.

First Class all the Way!

Class 1 dielectric MLCCs have advanced in a manner that is similar to Class 2 MLCCs.  In the same vein as “A Farad on the Head of a Pin for Free,” you can now get more capacitance in a smaller package, for less $, all with higher voltage rating and better reliability.  So when you need a stable, robust capacitor in the 0.22 µF or less range, always look for the C0G MLCC solution first, because Class 1 dielectrics are definitely First Class.  TTFN!

You Don’t Get Something for Nothing

You see, stuffing all of that capacitance into a tiny little package requires the use of dielectric materials that have a very high dielectric constant (K), which is basically a unitless measure of the charge density of active dipoles in a given volume as compared to an equivalent volume of vacuum.   All other things being constant, capacitance per unit volume increases linearly as K increases.  Because of this, most Class 2 MLCC are made with high K (i.e., K = 2500+) ceramic materials, that are almost all based on the “magical” crystal chemistry of barium titanate (BaTiO₃) or BT.  But BT also has a “bad side.”

God’s Gift to Ceramics

Barium titanate is an amazing material.  It is not found in nature and was originally developed in the early 1900s for use in radar systems for its ferroelectric properties.  These properties are discussed in Venkel’s White Paper: Testing and Measurement Practices of High Capacitance Ceramic Capacitors and those properties are profound...so much so that one of my professors at Alfred University deemed it “God’s Gift to Ceramics.” 

While these ferroelectric properties enable dielectrics with extremely high K, they also result in movement of the internal crystal structure (i.e., piezoelectric effect and to a lesser extent, electrostriction) when an electric field is applied, and they also result in a build-up of charge (electric field) when an external mechanical stimulus is applied.  This movement of the internal structure can translate to the exterior of the material and can be quite significant.  Because of this, BT can be used to make buzzers, speakers and other devices requiring mechanical displacement, as well as devices that convert mechanical stimulus into electrical charge, such as igniters. That mechanical displacement can make noise, and that noise can add up if multiple MLCCs “see” a similar and significant electronic signal in the audible range resulting in a “choir of singing MLCCs.”  This effect can be further “amplified” if the MLCCs are rigidly coupled to the circuit board in a manner that results in amplification of the resulting pressure waves, causing a makeshift speaker of sorts.  This effect becomes more prominent if the board is relatively large.

It should be noted that the above piezoelectric and electrostrictive effects also “work in reverse,” meaning that mechanical displacement of Class 2 MLCCs from the exterior of the MLCC device (i.e., noise, vibration or the like) may resulted in added electrical noise to your signals.  This is called “microphonic effect” and has the same scientific bases of operation.

Trade-Off Time

So here is the conundrum.  How do you take advantage of BT’s high K for your high capacitance density MLCC needs, while minimizing piezoelectric and/or electrostrictive side effects that accompany ferroelectric behavior and that result in an annoying buzzing when a signal of significant field, in the audible frequency band is applied (or half the audible band, in the case of electrostriction, due to its frequency doubling effect)?  The answer lies in the trade-offs that you are willing to take in your design. 

You can avoid signals in the audible frequency range.  You can also reduce the amplitude of the signal such as by reducing ripple in a circuit or the like.  You can also change the waveform, for example to a relatively gentle sinusoid from a sharper digital waveform.

You can also use a device that will effectively “see” a smaller signal field.  That can be accomplished using an MLCC with a higher voltage rating than is needed (i.e., one with a thicker dielectric, and thus reduced signal field).  You can also use lower capacitance values (in parallel if necessary).  This can be especially effective at reducing noise if you use a mutual cancellation approach, such as populating the board on both sides and feeding the same signal to two MLCCs that are directly opposite to each other.  Additionally, you can swap the MLCC with one having a lower dielectric constant, as this effect (e.g., d₃₃) tends to increase with increasing K (e.g., swap an X5R for a Y5V, or an X7R for and X5R, or a C0G (Class 1) for any of these).  This will likely come at the expense of board real estate however.  If a C0G MLCC cannot be used, you may want to consider using a tantalum capacitor in place of the “singing capacitors” if the signal is appropriate so as to avoid imposing reverse polarity to the Ta caps.

You can also reduce the stiffness of the mechanical coupling of the MLCC to the board using compliant lead devices and by not using epoxy or other rigid materials to attach the MLCC to the circuit board in areas other than the terminals (typically used for wave solder attach).  Additionally, you can orient the internal electrode plates of the MLCC orthogonal to the plane of the board, which will reduce mechanical coupling to the circuit board on the Z-axis.  Further, you can populate the MLCCs toward the periphery of the circuit board as opposed to the middle of the board, but be sure to consider design rules regarding flex cracks if you do this, and to remember that local grouping of multiple MLCCs that “see” this type of signal should be avoided as the volume of the noise increases significantly when MLCCs “seeing” that type of signal are grouped. 

Seen and Not Heard

So please remember that the Class 2 MLCC in your design can produce noise (and can add noise to your signals) in certain designs.  If your design or your application needs to be quiet, you will need to select devices appropriately as well as to design your circuit so that it “speaks no evil” and “hears no evil.”  Prudent device selection and circuit design can minimize or eliminate these effects so that your capacitors can be “seen and not heard.”  I wish you well with your designs.  Until next time, TTFN!

(This post is part of a series. See Part 1 to get caught up.)

Hello fellow engineers, task masters, and problem solvers.  Hope all is going well and productive in your world. Well, it looks like Test machines and LCR meters have been at it again – not supplying the correct and adequate test voltage to a high value ceramic capacitor when undergoing testing to determine if their capacitance is within specification for these little multi-layer ceramic devices (components)]. 

 Because the current required to drive a 1KHz signal across a 10μF DUT (device under test) capacitor at either 0.5VAC or 1.0VAC may exceed the AC current capability of a typical LCR meter, it may not be best (in order to obtain an accurate reading) to measure capacitance values of 10μF or above at 1KHz, as this may cause the test voltage at the DUT to be reduced significantly below the set value, leading to erroneously low measured capacitance. This is certainly the case for values from 22uF to 220uF but the 10uF seems to be a special case as all manufacturers call for the 10uF to be tested at 1V  RMS and 1KHz.  I know you have heard the phrase “ if all else fails – read the directions – we’ll, in this case it would be the owner’s manual of your capacitance meter.  Reading it will help you understand the current capability of its power supply. If the current capability of the power supply of your meter exceeds approximately 70 mARMS, it may be suitable to use it to measure capacitance of 10μF capacitors at 1 KHz. Otherwise, it may not be suitable to test at  1KHz, and may be necessary to measure capacitance at 120Hz in order to obtain the actual capacitance value (or at least get close to it).  I will go into the 10uF case at another time but for now, here is some data that will help set this all up and hopefully provide some insight into this issue (or maybe it’s better termed as an “on-going challenge”).

The impedance values at two common measurement frequencies (120Hz and 1000Hz) for the same capacitance values is indicated in Table 1 below:

   Table 1.  Impedance of a MLCC at 120Hz & 1KHz

Figure 1. Z vs. frequency for MLCC’s for a large range of capacitance values

So what does this all mean?  How can it help me understand my test set-up and results? What should I do to get better and more accurate results?  Questions that we will discuss and go into further detail next time. For now, keep solving those problems and remember, there is no “failure”, only feedback.  It may be bad or good feedback, but it’s still feedback.

Until next time.

Set-up, measurement, accuracy, test method, result; Words that test engineers know and live by.  We all want accurate results and if you ask 10 test engineers, you might get 10 different answers on how to get there.   When you tell a test engineer that his or her results are incorrect, they may take offense and push back and say they’re ones that are correct and its your products that are out of specification. 

 This is what we find when encountering measurement or correlation issues when endeavoring to measure high value (typically considered to be > 1uF) Multi-Layer Capacitors or MLCC’s.  The inability to accurately measure high value MLCC’s has been an issue in our industry for years with the advent of high value MLCC’s, the issue does not appear to be going away anytime soon. This is due to the fact that many capacitance testers and LCR meters used throughout the industry are not designed to, nor have the capability to correctly measure capacitance of high capacitance (Hi-Cap) MLCCs. This is the case whether we are measuring capacitors at 1 VAC and 1 KHz or 0.5 VAC and 120 Hz. The inability to correctly measure high capacitance MLCCs is due to two reasons. First, many LCR meters do not have the capability of supplying enough current to the capacitor being tested at 1KHz and 1 VAC, resulting in a reduced measurement voltage which results in an artificially reduced capacitance reading. Second, Hi-Cap MLCCs typically utilize Class 2 dielectrics (e.g. X5R, X6S, X7R, X7S, etc.) that are sensitive to test voltage in the sense that changing test voltage results in change in capacitance. Since Class 2 dielectrics are typically made with ferroelectric dielectric materials that are non-linear in behavior with respect to test voltage, this change in capacitance will occur. These two reasons plus the ageing phenomenon (discussed in an upcoming Blog) exacerbates the issue and explains why it is essential to ensure that you apply the correct test voltage to the MLCC when measuring or testing a capacitor and trying to obtain its actual capacitance value. Incorporating the right bridge and applying the correct parameters is essential in obtaining an accurate capacitance measurement.

 To ensure that capacitance is correctly measured, each capacitor must be tested under the correct conditions. The correct conditions for measurement depend upon the capability of the measurement equipment as well as the nominal capacitance to be measured. Since Capacitance measurements are typically performed in the low range of the frequency scale around 120Hz-1KHz, the capacitive reactance (X_C) typically dominates the impedance equation, and Z may be estimated from the relationship:

From this relationship, it is clear that the impedance of a capacitor is dependent upon frequency and capacitance value. So why does the electronic industry make a standard to measure a 10uF MLCC at 1KHz but a 15uF at 120Hz?

In my next post I will discuss this in more detail and demonstrate how that works in the form of a graph and some additional data.  Then,  I will continue with providing information and data to support the theory that MLCC’s with the value of 10uF should also be tested at 120Hz and not 1kHz. This should “stir the pot” a bit as I have encountered numerous instances where this is the case when older test equipment is used throughout the industry.  Some customers have re-evaluated their test frequencies based on cap value and the type of test equipment they have and have done so with good success.

 Hope to see you next month and as you know – “Engineers make the world go around! ”^TM